Parameter		Nominal							FS		SF		SS		FF
	c018bcd_gen2_v1d6_usage.scs		tt_lib							fs_lib		sf_lib		ss_lib		ff_lib
	c018bcd_gen2_v1d6_usage.scs		pre_simu							nom		nom		nom		nom
	param_test									<unspecified section>		<unspecified section>		<unspecified section>		<unspecified section>
Test	Output	Nominal Spec	Nominal	Spec	Weight	Pass/Fail	Min	Max	FS Spec	FS	SF Spec	SF	SS Spec	SS	FF Spec	FF
THESIS:TB_TOP_64_64_8:1	/clk
THESIS:TB_TOP_64_64_8:1	/EN
THESIS:TB_TOP_64_64_8:1	/RW
THESIS:TB_TOP_64_64_8:1	/X_ADDRESS_IN<2:0>
THESIS:TB_TOP_64_64_8:1	/Y_ADDRESS_IN<5:0>
THESIS:TB_TOP_64_64_8:1	/reset
THESIS:TB_TOP_64_64_8:1	/Z_BUS<7:0>
THESIS:TB_TOP_64_64_8:1	/TOP/RRAM_ANALOG/SA_IN<1:8>
THESIS:TB_TOP_64_64_8:1	/TOP/RRAM_ANALOG/SA_IN<9:16>
THESIS:TB_TOP_64_64_8:1	/TOP/RRAM_ANALOG/SA_VO<1>
THESIS:TB_TOP_64_64_8:1	/TOP/RRAM_ANALOG/net1<0>
THESIS:TB_TOP_64_64_8:1	/TOP/RRAM_ANALOG/SA_VO<2>
THESIS:TB_TOP_64_64_8:1	/TOP/RRAM_ANALOG/net1<1>
THESIS:TB_TOP_64_64_8:1	/TOP/RRAM_ANALOG/SA_VO<3>
THESIS:TB_TOP_64_64_8:1	/TOP/RRAM_ANALOG/net1<2>
THESIS:TB_TOP_64_64_8:1	/TOP/RRAM_ANALOG/SA_VO<4>
THESIS:TB_TOP_64_64_8:1	/TOP/RRAM_ANALOG/net1<3>
THESIS:TB_TOP_64_64_8:1	/TOP/RRAM_ANALOG/SA_VO<5>
THESIS:TB_TOP_64_64_8:1	/TOP/RRAM_ANALOG/net1<4>
THESIS:TB_TOP_64_64_8:1	/TOP/RRAM_ANALOG/SA_VO<6>
THESIS:TB_TOP_64_64_8:1	/TOP/RRAM_ANALOG/net1<5>
THESIS:TB_TOP_64_64_8:1	/TOP/RRAM_ANALOG/SA_VO<7>
THESIS:TB_TOP_64_64_8:1	/TOP/RRAM_ANALOG/net1<6>
THESIS:TB_TOP_64_64_8:1	/TOP/RRAM_ANALOG/SA_VO<8>
THESIS:TB_TOP_64_64_8:1	/TOP/RRAM_ANALOG/net1<7>
THESIS:TB_TOP_64_64_8:1	/TOP/Z_SA<0>
THESIS:TB_TOP_64_64_8:1	/TOP/Z_SA<1>
THESIS:TB_TOP_64_64_8:1	/TOP/Z_SA<2>
THESIS:TB_TOP_64_64_8:1	/TOP/Z_SA<3>
THESIS:TB_TOP_64_64_8:1	/TOP/Z_SA<4>
THESIS:TB_TOP_64_64_8:1	/TOP/Z_SA<5>
THESIS:TB_TOP_64_64_8:1	/TOP/Z_SA<6>
THESIS:TB_TOP_64_64_8:1	/TOP/Z_SA<7>
THESIS:TB_TOP_64_64_8:1	/P<55>
THESIS:TB_TOP_64_64_8:1	/P<54>
THESIS:TB_TOP_64_64_8:1	/P<53>
THESIS:TB_TOP_64_64_8:1	/P<52>
THESIS:TB_TOP_64_64_8:1	/P<51>
THESIS:TB_TOP_64_64_8:1	/P<50>
THESIS:TB_TOP_64_64_8:1	/P<49>
THESIS:TB_TOP_64_64_8:1	/P<48>
THESIS:TB_TOP_64_64_8:1	/TOP/RRAM_ANALOG/N<56>
THESIS:TB_TOP_64_64_8:1	/TOP/RRAM_ANALOG/N<55>
THESIS:TB_TOP_64_64_8:1	/TOP/RRAM_ANALOG/N<54>
THESIS:TB_TOP_64_64_8:1	/TOP/RRAM_ANALOG/N<53>
THESIS:TB_TOP_64_64_8:1	/TOP/RRAM_ANALOG/N<52>
THESIS:TB_TOP_64_64_8:1	/TOP/RRAM_ANALOG/N<51>
THESIS:TB_TOP_64_64_8:1	/TOP/RRAM_ANALOG/N<50>
THESIS:TB_TOP_64_64_8:1	/TOP/RRAM_ANALOG/N<49>
THESIS:TB_TOP_64_64_8:1	READ_2		10				10	14		10		10		10		14
THESIS:TB_TOP_64_64_8:1	WRITE_1_7	< -2.31	-2.018	< (-0.7 * VAR("VDDW"))		fail	-2.357	-1.594	< -2.31	-1.991	< -2.31	-1.921	< -2.31	-1.594	< -2.31	-2.357
THESIS:TB_TOP_64_64_8:1	WRITE_1_6	> 2.31	2.522	> (0.7 * VAR("VDDW"))		pass	2.371	2.566	> 2.31	2.543	> 2.31	2.482	> 2.31	2.371	> 2.31	2.566
THESIS:TB_TOP_64_64_8:1	WRITE_1_5	< -2.31	-1.962	< (-0.7 * VAR("VDDW"))		fail	-2.327	-1.479	< -2.31	-1.929	< -2.31	-1.846	< -2.31	-1.479	< -2.31	-2.327
THESIS:TB_TOP_64_64_8:1	WRITE_1_4	> 2.31	2.52	> (0.7 * VAR("VDDW"))		pass	2.373	2.565	> 2.31	2.544	> 2.31	2.478	> 2.31	2.373	> 2.31	2.565
THESIS:TB_TOP_64_64_8:1	WRITE_1_3	< -2.31	-1.97	< (-0.7 * VAR("VDDW"))		fail	-2.333	-1.488	< -2.31	-1.94	< -2.31	-1.854	< -2.31	-1.488	< -2.31	-2.333
THESIS:TB_TOP_64_64_8:1	WRITE_1_2	> 2.31	2.522	> (0.7 * VAR("VDDW"))		pass	2.372	2.566	> 2.31	2.545	> 2.31	2.479	> 2.31	2.372	> 2.31	2.566
THESIS:TB_TOP_64_64_8:1	WRITE_1_1	< -2.31	-1.988	< (-0.7 * VAR("VDDW"))		fail	-2.344	-1.51	< -2.31	-1.964	< -2.31	-1.872	< -2.31	-1.51	< -2.31	-2.344
THESIS:TB_TOP_64_64_8:1	WRITE_1_0	> 2.31	2.581	> (0.7 * VAR("VDDW"))		pass	2.5	2.615	> 2.31	2.615	> 2.31	2.558	> 2.31	2.5	> 2.31	2.604
THESIS:TB_TOP_64_64_8:1	WRITE_2_7	> 2.31	2.584	> (0.7 * VAR("VDDW"))		pass	2.481	2.607	> 2.31	2.588	> 2.31	2.561	> 2.31	2.481	> 2.31	2.607
THESIS:TB_TOP_64_64_8:1	WRITE_2_6	< -2.31	-2.029	< (-0.7 * VAR("VDDW"))		fail	-2.384	-1.563	< -2.31	-2.041	< -2.31	-1.927	< -2.31	-1.563	< -2.31	-2.384
THESIS:TB_TOP_64_64_8:1	WRITE_2_5	> 2.31	2.528	> (0.7 * VAR("VDDW"))		pass	2.378	2.581	> 2.31	2.572	> 2.31	2.498	> 2.31	2.378	> 2.31	2.581
THESIS:TB_TOP_64_64_8:1	WRITE_2_4	< -2.31	-2.022	< (-0.7 * VAR("VDDW"))		fail	-2.386	-1.542	< -2.31	-2.043	< -2.31	-1.917	< -2.31	-1.542	< -2.31	-2.386
THESIS:TB_TOP_64_64_8:1	WRITE_2_3	> 2.31	2.529	> (0.7 * VAR("VDDW"))		pass	2.385	2.582	> 2.31	2.575	> 2.31	2.499	> 2.31	2.385	> 2.31	2.582
THESIS:TB_TOP_64_64_8:1	WRITE_2_2	< -2.31	-2.028	< (-0.7 * VAR("VDDW"))		fail	-2.394	-1.546	< -2.31	-2.054	< -2.31	-1.922	< -2.31	-1.546	< -2.31	-2.394
THESIS:TB_TOP_64_64_8:1	WRITE_2_1	> 2.31	2.537	> (0.7 * VAR("VDDW"))		pass	2.401	2.585	> 2.31	2.584	> 2.31	2.513	> 2.31	2.401	> 2.31	2.585
THESIS:TB_TOP_64_64_8:1	WRITE_2_0	< -2.31	-2.093	< (-0.7 * VAR("VDDW"))		fail	-2.423	-1.693	< -2.31	-2.13	< -2.31	-1.996	< -2.31	-1.693	< -2.31	-2.423
THESIS:TB_TOP_64_64_8:1	READ_1_0		1.799	> 1.5		pass	1.799	1.799		1.799		1.799		1.799		1.799
THESIS:TB_TOP_64_64_8:1	READ_1_1		-3.679u	< 0.3		fail	-8.55u	1.799		1.799		-8.55u		-1.809u		1.799
THESIS:TB_TOP_64_64_8:1	READ_1_2		1.799	> 1.5		pass	1.799	1.799		1.799		1.799		1.799		1.799
THESIS:TB_TOP_64_64_8:1	READ_1_3		-2.604u	< 0.3		pass	-8.167u	27.15u		27.15u		2.063u		-8.167u		21.95u
THESIS:TB_TOP_64_64_8:1	READ_1_4		1.799	> 1.5		pass	1.799	1.799		1.799		1.799		1.799		1.799
THESIS:TB_TOP_64_64_8:1	READ_1_5		-78.67u	< 0.3		pass	-86.85u	28.66u		28.66u		-86.85u		-74.53u		5.097u
THESIS:TB_TOP_64_64_8:1	READ_1_6		1.799	> 1.5		pass	1.799	1.799		1.799		1.799		1.799		1.799
THESIS:TB_TOP_64_64_8:1	READ_1_7		-6.529u	< 0.3		pass	-6.529u	15.61u		15.61u		-5.032u		-5.024u		13.58u
THESIS:TB_TOP_64_64_8:1	READ_2_0		42.77u	< 0.3		pass	-25.26u	42.77u		26.95u		-4.639u		7.346u		-25.26u
THESIS:TB_TOP_64_64_8:1	READ_2_1		1.799	> 1.5		pass	1.799	1.799		1.799		1.799		1.799		1.799
THESIS:TB_TOP_64_64_8:1	READ_2_2		65.3u	< 0.3		fail	4.234u	1.799		36.5u		59.91u		4.234u		1.799
THESIS:TB_TOP_64_64_8:1	READ_2_3		1.799	> 1.5		pass	1.799	1.799		1.799		1.799		1.799		1.799
THESIS:TB_TOP_64_64_8:1	READ_2_4		-11.83u	< 0.3		fail	-14.82u	1.799		50.13u		-14.82u		7.146u		1.799
THESIS:TB_TOP_64_64_8:1	READ_2_5		1.799	> 1.5		pass	1.799	1.799		1.799		1.799		1.799		1.799
THESIS:TB_TOP_64_64_8:1	READ_2_6		-37.08u	< 0.3		fail	-37.08u	1.799		1.799		-5.229u		6.639u		1.799
THESIS:TB_TOP_64_64_8:1	READ_2_7		1.799	> 1.5		pass	1.799	1.799		1.799		1.799		1.799		1.799
THESIS:TB_TOP_64_64_8:1	READ_1		5				5	7		7		5		5		7

Created on 8 Aug 2021 04:45:48 by Dimitris Antoniadis (da220).