Parameter		Nominal							FS		SF		SS		FF
	c018bcd_gen2_v1d6_usage.scs		tt_lib							fs_lib		sf_lib		ss_lib		ff_lib
	c018bcd_gen2_v1d6_usage.scs		pre_simu							nom		nom		nom		nom
	param_test									<unspecified section>		<unspecified section>		<unspecified section>		<unspecified section>
Test	Output	Nominal Spec	Nominal	Spec	Weight	Pass/Fail	Min	Max	FS Spec	FS	SF Spec	SF	SS Spec	SS	FF Spec	FF
THESIS:TB_TOP_64_64_8:1	/clk
THESIS:TB_TOP_64_64_8:1	/EN
THESIS:TB_TOP_64_64_8:1	/RW
THESIS:TB_TOP_64_64_8:1	/X_ADDRESS_IN<2:0>
THESIS:TB_TOP_64_64_8:1	/Y_ADDRESS_IN<5:0>
THESIS:TB_TOP_64_64_8:1	/reset
THESIS:TB_TOP_64_64_8:1	/Z_BUS<7:0>
THESIS:TB_TOP_64_64_8:1	/TOP/RRAM_ANALOG/SA_IN<1:8>
THESIS:TB_TOP_64_64_8:1	/TOP/RRAM_ANALOG/SA_IN<9:16>
THESIS:TB_TOP_64_64_8:1	/TOP/RRAM_ANALOG/SA_VO<1>
THESIS:TB_TOP_64_64_8:1	/TOP/RRAM_ANALOG/net1<0>
THESIS:TB_TOP_64_64_8:1	/TOP/RRAM_ANALOG/SA_VO<2>
THESIS:TB_TOP_64_64_8:1	/TOP/RRAM_ANALOG/net1<1>
THESIS:TB_TOP_64_64_8:1	/TOP/RRAM_ANALOG/SA_VO<3>
THESIS:TB_TOP_64_64_8:1	/TOP/RRAM_ANALOG/net1<2>
THESIS:TB_TOP_64_64_8:1	/TOP/RRAM_ANALOG/SA_VO<4>
THESIS:TB_TOP_64_64_8:1	/TOP/RRAM_ANALOG/net1<3>
THESIS:TB_TOP_64_64_8:1	/TOP/RRAM_ANALOG/SA_VO<5>
THESIS:TB_TOP_64_64_8:1	/TOP/RRAM_ANALOG/net1<4>
THESIS:TB_TOP_64_64_8:1	/TOP/RRAM_ANALOG/SA_VO<6>
THESIS:TB_TOP_64_64_8:1	/TOP/RRAM_ANALOG/net1<5>
THESIS:TB_TOP_64_64_8:1	/TOP/RRAM_ANALOG/SA_VO<7>
THESIS:TB_TOP_64_64_8:1	/TOP/RRAM_ANALOG/net1<6>
THESIS:TB_TOP_64_64_8:1	/TOP/RRAM_ANALOG/SA_VO<8>
THESIS:TB_TOP_64_64_8:1	/TOP/RRAM_ANALOG/net1<7>
THESIS:TB_TOP_64_64_8:1	/TOP/Z_SA<0>
THESIS:TB_TOP_64_64_8:1	/TOP/Z_SA<1>
THESIS:TB_TOP_64_64_8:1	/TOP/Z_SA<2>
THESIS:TB_TOP_64_64_8:1	/TOP/Z_SA<3>
THESIS:TB_TOP_64_64_8:1	/TOP/Z_SA<4>
THESIS:TB_TOP_64_64_8:1	/TOP/Z_SA<5>
THESIS:TB_TOP_64_64_8:1	/TOP/Z_SA<6>
THESIS:TB_TOP_64_64_8:1	/TOP/Z_SA<7>
THESIS:TB_TOP_64_64_8:1	/P<55>
THESIS:TB_TOP_64_64_8:1	/P<54>
THESIS:TB_TOP_64_64_8:1	/P<53>
THESIS:TB_TOP_64_64_8:1	/P<52>
THESIS:TB_TOP_64_64_8:1	/P<51>
THESIS:TB_TOP_64_64_8:1	/P<50>
THESIS:TB_TOP_64_64_8:1	/P<49>
THESIS:TB_TOP_64_64_8:1	/P<48>
THESIS:TB_TOP_64_64_8:1	/TOP/RRAM_ANALOG/N<56>
THESIS:TB_TOP_64_64_8:1	/TOP/RRAM_ANALOG/N<55>
THESIS:TB_TOP_64_64_8:1	/TOP/RRAM_ANALOG/N<54>
THESIS:TB_TOP_64_64_8:1	/TOP/RRAM_ANALOG/N<53>
THESIS:TB_TOP_64_64_8:1	/TOP/RRAM_ANALOG/N<52>
THESIS:TB_TOP_64_64_8:1	/TOP/RRAM_ANALOG/N<51>
THESIS:TB_TOP_64_64_8:1	/TOP/RRAM_ANALOG/N<50>
THESIS:TB_TOP_64_64_8:1	/TOP/RRAM_ANALOG/N<49>
THESIS:TB_TOP_64_64_8:1	READ_2		10				10	14		10		10		10		14
THESIS:TB_TOP_64_64_8:1	WRITE_1_7	< -2.31	-2.603	< (-0.7 * VAR("VDDW"))		near	-2.873	-2.244	< -2.31	-2.672	< -2.31	-2.491	< -2.31	-2.244	< -2.31	-2.873
THESIS:TB_TOP_64_64_8:1	WRITE_1_6	> 2.31	2.546	> (0.7 * VAR("VDDW"))		pass	2.498	2.589	> 2.31	2.574	> 2.31	2.51	> 2.31	2.498	> 2.31	2.589
THESIS:TB_TOP_64_64_8:1	WRITE_1_5	< -2.31	-2.583	< (-0.7 * VAR("VDDW"))		near	-2.852	-2.223	< -2.31	-2.649	< -2.31	-2.474	< -2.31	-2.223	< -2.31	-2.852
THESIS:TB_TOP_64_64_8:1	WRITE_1_4	> 2.31	2.546	> (0.7 * VAR("VDDW"))		pass	2.494	2.592	> 2.31	2.573	> 2.31	2.51	> 2.31	2.494	> 2.31	2.592
THESIS:TB_TOP_64_64_8:1	WRITE_1_3	< -2.31	-2.586	< (-0.7 * VAR("VDDW"))		near	-2.855	-2.225	< -2.31	-2.652	< -2.31	-2.475	< -2.31	-2.225	< -2.31	-2.855
THESIS:TB_TOP_64_64_8:1	WRITE_1_2	> 2.31	2.547	> (0.7 * VAR("VDDW"))		pass	2.497	2.593	> 2.31	2.574	> 2.31	2.511	> 2.31	2.497	> 2.31	2.593
THESIS:TB_TOP_64_64_8:1	WRITE_1_1	< -2.31	-2.587	< (-0.7 * VAR("VDDW"))		near	-2.858	-2.23	< -2.31	-2.652	< -2.31	-2.477	< -2.31	-2.23	< -2.31	-2.858
THESIS:TB_TOP_64_64_8:1	WRITE_1_0	> 2.31	2.57	> (0.7 * VAR("VDDW"))		pass	2.513	2.61	> 2.31	2.583	> 2.31	2.538	> 2.31	2.513	> 2.31	2.61
THESIS:TB_TOP_64_64_8:1	WRITE_2_7	> 2.31	2.581	> (0.7 * VAR("VDDW"))		pass	2.522	2.611	> 2.31	2.6	> 2.31	2.539	> 2.31	2.522	> 2.31	2.611
THESIS:TB_TOP_64_64_8:1	WRITE_2_6	< -2.31	-2.611	< (-0.7 * VAR("VDDW"))		near	-2.863	-2.245	< -2.31	-2.668	< -2.31	-2.494	< -2.31	-2.245	< -2.31	-2.863
THESIS:TB_TOP_64_64_8:1	WRITE_2_5	> 2.31	2.559	> (0.7 * VAR("VDDW"))		pass	2.484	2.592	> 2.31	2.579	> 2.31	2.51	> 2.31	2.484	> 2.31	2.592
THESIS:TB_TOP_64_64_8:1	WRITE_2_4	< -2.31	-2.614	< (-0.7 * VAR("VDDW"))		near	-2.864	-2.244	< -2.31	-2.671	< -2.31	-2.495	< -2.31	-2.244	< -2.31	-2.864
THESIS:TB_TOP_64_64_8:1	WRITE_2_3	> 2.31	2.56	> (0.7 * VAR("VDDW"))		pass	2.484	2.593	> 2.31	2.58	> 2.31	2.511	> 2.31	2.484	> 2.31	2.593
THESIS:TB_TOP_64_64_8:1	WRITE_2_2	< -2.31	-2.618	< (-0.7 * VAR("VDDW"))		near	-2.867	-2.249	< -2.31	-2.677	< -2.31	-2.498	< -2.31	-2.249	< -2.31	-2.867
THESIS:TB_TOP_64_64_8:1	WRITE_2_1	> 2.31	2.561	> (0.7 * VAR("VDDW"))		pass	2.485	2.594	> 2.31	2.581	> 2.31	2.509	> 2.31	2.485	> 2.31	2.594
THESIS:TB_TOP_64_64_8:1	WRITE_2_0	< -2.31	-2.641	< (-0.7 * VAR("VDDW"))		near	-2.892	-2.291	< -2.31	-2.715	< -2.31	-2.519	< -2.31	-2.291	< -2.31	-2.892
THESIS:TB_TOP_64_64_8:1	READ_1_0		1.799	> 1.5		pass	1.799	1.799		1.799		1.799		1.799		1.799
THESIS:TB_TOP_64_64_8:1	READ_1_1		33.6u	< 0.3		fail	-6.756u	1.799		1.799		-611.6n		-6.756u		1.799
THESIS:TB_TOP_64_64_8:1	READ_1_2		1.799	> 1.5		pass	1.799	1.799		1.799		1.799		1.799		1.799
THESIS:TB_TOP_64_64_8:1	READ_1_3		25.07u	< 0.3		pass	-108.1n	25.07u		25.58n		-108.1n		700.8n		737.9n
THESIS:TB_TOP_64_64_8:1	READ_1_4		1.799	> 1.5		pass	1.799	1.799		1.799		1.799		1.799		1.799
THESIS:TB_TOP_64_64_8:1	READ_1_5		-10.09u	< 0.3		pass	-12.95u	7.478u		7.478u		-983.5n		3.292u		-12.95u
THESIS:TB_TOP_64_64_8:1	READ_1_6		1.799	> 1.5		pass	1.799	1.799		1.799		1.799		1.799		1.799
THESIS:TB_TOP_64_64_8:1	READ_1_7		-16.09u	< 0.3		pass	-16.09u	4.237u		1.986u		-8.223u		-13.83u		4.237u
THESIS:TB_TOP_64_64_8:1	READ_2_0		45.86u	< 0.3		pass	-20.87u	45.86u		-20.87u		-4.181u		7.075u		-11.02u
THESIS:TB_TOP_64_64_8:1	READ_2_1		1.799	> 1.5		pass	1.799	1.799		1.799		1.799		1.799		1.799
THESIS:TB_TOP_64_64_8:1	READ_2_2		65.2u	< 0.3		fail	-37.1u	1.799		-37.1u		60.68u		5.673u		1.799
THESIS:TB_TOP_64_64_8:1	READ_2_3		1.799	> 1.5		pass	1.799	1.799		1.799		1.799		1.799		1.799
THESIS:TB_TOP_64_64_8:1	READ_2_4		-5.956u	< 0.3		fail	-18.41u	1.799		-18.41u		-14.1u		7.137u		1.799
THESIS:TB_TOP_64_64_8:1	READ_2_5		1.799	> 1.5		pass	1.799	1.799		1.799		1.799		1.799		1.799
THESIS:TB_TOP_64_64_8:1	READ_2_6		-27.52u	< 0.3		fail	-27.52u	1.799		1.799		5.419u		5.242u		1.799
THESIS:TB_TOP_64_64_8:1	READ_2_7		1.799	> 1.5		pass	1.799	1.799		1.799		1.799		1.799		1.799
THESIS:TB_TOP_64_64_8:1	READ_1		5				5	7		7		5		5		7

Created on 8 Aug 2021 06:35:04 by Dimitris Antoniadis (da220).