[][src]Module pir_8_emu::isa

All data specified directly in the ISA.

Unless stated otherwise, bits are always represented from MSB to LSB (reading left to right) and multi-bytes sequences are big-endian.

So, a jump instruction followed by a two byte address would have the following sequence of bytes "jump", "high address byte", "low address byte".

Modules

instruction

An instruction is a single byte, and can include some following immediate values purely for data.

Structs

GeneralPurposeRegister

There are eight 8-bit General Purpose registers, each has an internal address for use within the CPU, instructions like MOVE and LOAD can use these addresses.

SpecialPurposeRegister

There are some special purpose registers that you cannot directly read/write from, these are used by the CPU for its internal state.

Type Definitions

GeneralPurposeRegisterBank

Convenience typedef for bank of all 8 GP registers.