Propeller Device Specific Functions and Registers
v0.5
Provides low level access to Propeller microcontroller functions and registers.
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Inludes common API definitions for COG programming. More...
Go to the source code of this file.
Macros | |
#define | _COGMEM __attribute__((cogmem)) |
Can be used in per-variable declarations to tell compiler that a variable should go in COG memory. | |
#define | _NATIVE __attribute__((native)) |
Can be used in per-function declarations to tell compiler that function will use cog "call/ret" calling (nonrecursive). | |
#define | _NAKED __attribute__((naked)) |
Can be used in per-function declarations to tell compiler that function will not have an epilogue or prologue: these should never return. | |
#define | _FCACHE __attribute__((fcache)) |
Can be used in per-function declarations to tell compiler that function should be compiled to load into fcache; useful for guaranteeing timing of small functions. | |
#define | _CLKFREQ _clkfreq |
This is an alias for the 32 bit clock frequency which is kept in address 0. | |
#define | _CLKMODE _clkmode |
This is an alias for the 8 bit clock mode which is kept in address 4. |
Variables | |
unsigned int | _clkfreq |
unsigned char | _clkmode |
Inludes common API definitions for COG programming.
Each COG includes 16 32 bit special purpose registers. The purposes of the registers are to provide control over user I/O input and output. Some registers like INB, OUTB, DIRB are not used with P8X32A.
The state of each physical input pin is available to any COG via INA. Output pin values are the bitwise "wire OR" of all the COGs at the physical output pins when the DIRA bits are set high (1).
OUTA bits control the state of the physical output pins. If one COG sets a pin to output high (1), and another COG sets the same pin to output low (0), the high (1) will be set.
The per COG special purpose register summary:
Register Description PAR Parameter register is used for sharing HUB RAM address info with the COG. CNT The system clock count INA Use to read the pins when corresponding DIRA bits are 0. INB Unused in P8X32A OUTA Use to set pin states when corresponding DIRA bits are 1. OUTB Unused in P8X32A DIRA Use to set pins to input (0) or output (1). DIRB Unused in P8X32A CTRA Counter A control register. CTRB Counter B control register. FRQA Counter A frequency register. FRQB Counter B frequency register. PHSA Counter A phase accumulation register. PHSB Counter B phase accumulation register. VCFG Video Configuration register can be used for other special output. VSCL Video Scale register for setting pixel and frame clocks.
#define _CLKMODE _clkmode |
This is an alias for the 8 bit clock mode which is kept in address 4.
This is not automatically updated by the clkset macro.
#define _COGMEM __attribute__((cogmem)) |
Can be used in per-variable declarations to tell compiler that a variable should go in COG memory.
for variables that should go in cog memory
#define _NAKED __attribute__((naked)) |
Can be used in per-function declarations to tell compiler that function will not have an epilogue or prologue: these should never return.
for functions with no epilogue or prologue: these should never return
#define _NATIVE __attribute__((native)) |
Can be used in per-function declarations to tell compiler that function will use cog "call/ret" calling (nonrecursive).
for functions that use cog "call/ret" calling (nonrecursive)
unsigned int _clkfreq |
32 bit system startup clock frequency variable
unsigned char _clkmode |
System startup clock mode